Digital communications systems are those in which the information or data communicated is represented by discrete symbols which may be directly transmitted or used to modulate a carrier signal. Synchronous digital transmission systems are those wherein the operation of the transmitter and receiver must be synchronized to one another to accurately recover the transmitted data.
A variety of architectures are used for synchronous digital communications systems. One such architecture is the so-called dual-duplex architecture. In a duplex system, the data is transmitted at some predetermined rate over a communications channel in two directions. Each duplex communications channel includes a transmitter and receiver circuitry along with a communications signal path therebetween. This communications signal path can take a variety of forms, such as wire, optical fiber, or air. Within each receiver, an equalizer is typically employed to compensate for the distortion present in the incoming data. Such equalizers are generally automatic or adaptive and utilize coefficients which are periodically or continuously updated to track changes in the distortion with time.
In a dual-duplex architecture, the data at some predetermined rate is evenly divided over two bidirectional transmission channels, i.e., two communications signal paths, so that the data rate in each channel is one-half of the predetermined rate. The problem with such an architecture is that the propagation delay of each channel is generally different and this difference may vary with time. As a result, accurate recovery of the transmitted data is, in general, not possible unless this propagation delay difference is compensated for via some form of synchronization arrangement and such arrangement must initially synchronize the operation of the multiple equalizers.
Until recently, the provisioning of local subscriber loops, i.e., communications facilities connecting a customer's business or residential premises with a local central office in a public communications network for high-speed digital communications, required an engineering of each loop to meet error rate objectives. This engineering involved the removal of bridge taps and the installation of specifically spaced signal amplifiers or repeaters. In upcoming industry offerings for providing high-speed digital signals over subscriber loops, the need for such engineering has been eliminated. However, to meet the necessary signal cross-talk requirements, a dual-duplex architecture has been found to be the preferred system architecture. As previously discussed, the use of an architecture, in turn, requires that, for each direction of transmission, the transmission of data in each channel be synchronized to the other.
While a variety of digital signal synchronization techniques are known, each such arrangement possesses significant shortcommings and does not specifically address the problem of synchronizing the operation of multiple equalizers. In one class of known arrangements, for example, framing bits are periodically transmitted and detected to maintain synchronization. The use of such bits, however, reduces the date rate that would otherwise be available to the customer or increases the required channel bandwidth. In still another arrangement, such that disclosed in a pending U.S. patent application, Ser. No. 620,868, filed Nov. 30, 1990, by Werner and assigned to the present assignee, synchronization is maintained by modifying the modulation format that would otherwise be used so as to provide synchronization signals. While this scheme provides satisfactory results, the cost of the additional circuitry required does not meet the objectives of certain system applications.
Based on the foregoing, it would be extremely desirable if a synchronization arrangement which specifically address the problem of synchronizing the operation of multiple equalizers could be devised for digital communications systems which is easy to implement and would meet the cost objectives of a wide range of system applications.